This invention relates to the field of integrated circuits and specifically to a comparator circuit which exhibits improved low power supply operating voltage characteristics.
Many types of comparator circuits are well known in the art. Typical comparator circuits are usually configured as a differential amplifier which is sensitive to a difference in voltage between each of the respective inputs to the amplifier. The input and output stages of the conventional comparator circuit are typically coupled to devices which provide a constant current to a common node of the differential input transistors, as well as an independent constant current to the output stage of the comparator. The output nodes of the differential pair of transistors are typically coupled to a current mirror circuit. The output stage, consisting of several devices connected in series is usually coupled to the output of one of the differential input transistors.
Since comparators of this type consist of multiple transistors disposed in tandem, the low voltage operation of comparator circuits is limited by imbalances which occur between the input stage devices and the output stage devices.